思澈科技软件开发工具包  2.20
Modules | Macros
ADC Private Macros
Hardware Abstract Layer » Analog Digital Converter

Modules

 ADC range verification
 in function of ADC resolution selected (12, 10, 8 or 6 bits)
 
 ADC regular rank verification
 

Macros

#define ADC_IS_ENABLE(__HANDLE__)
 Verification of ADC state: enabled or disabled. More...
 
#define ADC_STATE_CLR_SET   MODIFY_REG
 Simultaneously clears and sets specific bits of the handle State. More...
 
#define ADC_CLEAR_ERRORCODE(__HANDLE__)   ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
 Clear ADC error code (set it to error code: "no error") More...
 
#define ADC_CHSELR_CHANNEL(_CHANNEL_)   ( 1U << (_CHANNEL_))
 Configure the channel number into channel selection register. More...
 
#define ADC_CFGR_CONTINUOUS(__HANDLE__, _CONTINUOUS_MODE_)   (((__HANDLE__)->Instance->ADC_CTRL_REG) |= (_CONTINUOUS_MODE_) << GPADC_ADC_CTRL_REG_ADC_OP_MODE_Pos)
 Enable ADC continuous conversion mode. More...
 
#define ADC_CFGR_DMACONTREQ(_DMACONTREQ_MODE_)   ((_DMACONTREQ_MODE_) << 1U)
 Enable the ADC DMA continuous request. More...
 
#define ADC_DMA_ENABLE(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_DMA_EN)
 Enable ADC DMA mode. More...
 
#define ADC_DMA_RAW_DATA(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_DMA_DATA_SEL)
 ADC DMA output raw data. More...
 
#define ADC_DMA_COMB_DATA(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG &= (~GPADC_ADC_CTRL_REG_DMA_DATA_SEL))
 ADC DMA output combined data. More...
 
#define ADC_DMA_DISABLE(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG &= (~GPADC_ADC_CTRL_REG_DMA_EN))
 Disable ADC DMA mode. More...
 
#define IS_ADC_SRC_TIMER(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG & GPADC_ADC_CTRL_REG_TIMER_TRIG_EN)
 Check if timer triger enable. More...
 
#define ADC_ENABLE_TIMER_TRIGER(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_TIMER_TRIG_EN)
 Enable timer triger. More...
 
#define ADC_DISABLE_TIMER_TRIGER(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG &= (~GPADC_ADC_CTRL_REG_TIMER_TRIG_EN))
 Enable timer triger. More...
 
#define ADC_ENABLE_GPIO_TRIGER(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_GPIO_TRIG_EN)
 Enable GPIO triger. More...
 
#define ADC_DISABLE_GPIO_TRIGER(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG &= (~GPADC_ADC_CTRL_REG_GPIO_TRIG_EN))
 Enable GPIO triger. More...
 
#define ADC_TIMER_TRIGER_LEVEL(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_TIMER_TRIG_TYP)
 ADC TIMER triger with level mode, need edge detect. More...
 
#define ADC_TIMER_TRIGER_PULSE(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG &=(~GPADC_ADC_CTRL_REG_TIMER_TRIG_TYP))
 ADC TIMER triger with pulse mode, no edge detect. More...
 
#define ADC_FRC_EN(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG |=(GPADC_ADC_CTRL_REG_FRC_EN_ADC))
 Manual open ADC power. More...
 
#define ADC_CLR_FRC_EN(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG &=(~GPADC_ADC_CTRL_REG_FRC_EN_ADC))
 AUTO open ADC power. More...
 
#define ADC_CHNL_SEL_FRC_EN(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG |=(GPADC_ADC_CTRL_REG_CHNL_SEL_FRC_EN))
 Use auto chnel selet in configure register. More...
 
#define ADC_CHNL_CLR_FRC_EN(__HANDLE__)   ((__HANDLE__)->Instance->ADC_CTRL_REG &=(~GPADC_ADC_CTRL_REG_CHNL_SEL_FRC_EN))
 Disable channel auto select. More...
 

Detailed Description

Macro Definition Documentation

◆ ADC_CFGR_CONTINUOUS

#define ADC_CFGR_CONTINUOUS (   __HANDLE__,
  _CONTINUOUS_MODE_ 
)    (((__HANDLE__)->Instance->ADC_CTRL_REG) |= (_CONTINUOUS_MODE_) << GPADC_ADC_CTRL_REG_ADC_OP_MODE_Pos)

Enable ADC continuous conversion mode.

Parameters
__HANDLE__ADC handle.
_CONTINUOUS_MODE_Continuous mode.
Return values
None

◆ ADC_CFGR_DMACONTREQ

#define ADC_CFGR_DMACONTREQ (   _DMACONTREQ_MODE_)    ((_DMACONTREQ_MODE_) << 1U)

Enable the ADC DMA continuous request.

Parameters
_DMACONTREQ_MODE_DMA continuous request mode.
Return values
None

◆ ADC_CHNL_CLR_FRC_EN

#define ADC_CHNL_CLR_FRC_EN (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG &=(~GPADC_ADC_CTRL_REG_CHNL_SEL_FRC_EN))

Disable channel auto select.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_CHNL_SEL_FRC_EN

#define ADC_CHNL_SEL_FRC_EN (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG |=(GPADC_ADC_CTRL_REG_CHNL_SEL_FRC_EN))

Use auto chnel selet in configure register.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_CHSELR_CHANNEL

#define ADC_CHSELR_CHANNEL (   _CHANNEL_)    ( 1U << (_CHANNEL_))

Configure the channel number into channel selection register.

Parameters
_CHANNEL_ADC Channel
Return values
None

◆ ADC_CLEAR_ERRORCODE

#define ADC_CLEAR_ERRORCODE (   __HANDLE__)    ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)

Clear ADC error code (set it to error code: "no error")

Parameters
__HANDLE__ADC handle
Return values
None

◆ ADC_CLR_FRC_EN

#define ADC_CLR_FRC_EN (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG &=(~GPADC_ADC_CTRL_REG_FRC_EN_ADC))

AUTO open ADC power.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_DISABLE_GPIO_TRIGER

#define ADC_DISABLE_GPIO_TRIGER (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG &= (~GPADC_ADC_CTRL_REG_GPIO_TRIG_EN))

Enable GPIO triger.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_DISABLE_TIMER_TRIGER

#define ADC_DISABLE_TIMER_TRIGER (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG &= (~GPADC_ADC_CTRL_REG_TIMER_TRIG_EN))

Enable timer triger.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_DMA_COMB_DATA

#define ADC_DMA_COMB_DATA (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG &= (~GPADC_ADC_CTRL_REG_DMA_DATA_SEL))

ADC DMA output combined data.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_DMA_DISABLE

#define ADC_DMA_DISABLE (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG &= (~GPADC_ADC_CTRL_REG_DMA_EN))

Disable ADC DMA mode.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_DMA_ENABLE

#define ADC_DMA_ENABLE (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_DMA_EN)

Enable ADC DMA mode.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_DMA_RAW_DATA

#define ADC_DMA_RAW_DATA (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_DMA_DATA_SEL)

ADC DMA output raw data.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_ENABLE_GPIO_TRIGER

#define ADC_ENABLE_GPIO_TRIGER (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_GPIO_TRIG_EN)

Enable GPIO triger.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_ENABLE_TIMER_TRIGER

#define ADC_ENABLE_TIMER_TRIGER (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_TIMER_TRIG_EN)

Enable timer triger.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_FRC_EN

#define ADC_FRC_EN (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG |=(GPADC_ADC_CTRL_REG_FRC_EN_ADC))

Manual open ADC power.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_IS_ENABLE

#define ADC_IS_ENABLE (   __HANDLE__)
Value:
(( (((__HANDLE__)->Instance->ADC_SLOT0_REG) & GPADC_ADC_SLOT0_REG_SLOT_EN) | \
(((__HANDLE__)->Instance->ADC_SLOT1_REG) & GPADC_ADC_SLOT1_REG_SLOT_EN) | \
(((__HANDLE__)->Instance->ADC_SLOT2_REG) & GPADC_ADC_SLOT2_REG_SLOT_EN) | \
(((__HANDLE__)->Instance->ADC_SLOT3_REG) & GPADC_ADC_SLOT3_REG_SLOT_EN) | \
(((__HANDLE__)->Instance->ADC_SLOT4_REG) & GPADC_ADC_SLOT4_REG_SLOT_EN) | \
(((__HANDLE__)->Instance->ADC_SLOT5_REG) & GPADC_ADC_SLOT5_REG_SLOT_EN) | \
(((__HANDLE__)->Instance->ADC_SLOT6_REG) & GPADC_ADC_SLOT6_REG_SLOT_EN) | \
(((__HANDLE__)->Instance->ADC_SLOT7_REG) & GPADC_ADC_SLOT7_REG_SLOT_EN) | \
) ? SET : RESET)

Verification of ADC state: enabled or disabled.

Parameters
__HANDLE__ADC handle
Return values
SET(ADC enabled) or RESET (ADC disabled)

◆ ADC_STATE_CLR_SET

#define ADC_STATE_CLR_SET   MODIFY_REG

Simultaneously clears and sets specific bits of the handle State.

Note
: ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(), the first parameter is the ADC handle State, the second parameter is the bit field to clear, the third and last parameter is the bit field to set.
Return values
None

◆ ADC_TIMER_TRIGER_LEVEL

#define ADC_TIMER_TRIGER_LEVEL (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG |= GPADC_ADC_CTRL_REG_TIMER_TRIG_TYP)

ADC TIMER triger with level mode, need edge detect.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ ADC_TIMER_TRIGER_PULSE

#define ADC_TIMER_TRIGER_PULSE (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG &=(~GPADC_ADC_CTRL_REG_TIMER_TRIG_TYP))

ADC TIMER triger with pulse mode, no edge detect.

Parameters
__HANDLE__ADC handle.
Return values
None

◆ IS_ADC_SRC_TIMER

#define IS_ADC_SRC_TIMER (   __HANDLE__)    ((__HANDLE__)->Instance->ADC_CTRL_REG & GPADC_ADC_CTRL_REG_TIMER_TRIG_EN)

Check if timer triger enable.

Parameters
__HANDLE__ADC handle.
Return values
Not0 if timer triger enable