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#define | __HAL_SYSCFG_GET_BOOT_MODE() (hwp_hpsys_cfg->BMR&HPSYS_CFG_BMR_BOOT_MODE_Msk) |
| Get Current boot mode. More...
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#define | __HAL_SYSCFG_SET_SWD(COREID) (hwp_lpsys_rcc->SWCR=COREID) |
| Set SWD interface. More...
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#define | __HAL_SYSCFG_SET_SECURITY() (hwp_hpsys_cfg->SCR|=HPSYS_CFG_SCR_FKEY_MODE) |
| Set Security Key control.
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#define | __HAL_SYSCFG_CLEAR_SECURITY() (hwp_hpsys_cfg->SCR&=~HPSYS_CFG_SCR_FKEY_MODE) |
| Clear Security Key control.
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#define | __HAL_SYSCFG_GET_SID() (hwp_hpsys_cfg->IDR>>HPSYS_CFG_IDR_SID_Pos) |
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#define | __HAL_SYSCFG_GET_CID() ((hwp_hpsys_cfg->IDR>>HPSYS_CFG_IDR_CID_Pos)&0xff) |
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#define | __HAL_SYSCFG_GET_PID() ((hwp_hpsys_cfg->IDR>>HPSYS_CFG_IDR_PID_Pos)&0xff) |
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#define | __HAL_SYSCFG_GET_REVID() (hwp_hpsys_cfg->IDR&0xff) |
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#define | __HAL_SYSCFG_Enable_USB() (hwp_hpsys_cfg->USBCR|=HPSYS_CFG_USBCR_USB_EN) |
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#define | __HAL_SYSCFG_USB_DM_PD() (hwp_hpsys_cfg->USBCR|=HPSYS_CFG_USBCR_DM_PD) |
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#define | __HAL_SYSCFG_Enable_WDT_REBOOT(enable) |
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#define | __HAL_SYSCFG_Enable_Assert_Trigger(enable) |
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#define | __HAL_SYSCFG_Trigger_Assert() (hwp_hpsys_cfg->DBGR |= HPSYS_CFG_DBGR_HP2LP_NMI) |
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#define | __HAL_SYSCFG_Get_Trigger_Assert_Flag() ((hwp_hpsys_cfg->DBGR & HPSYS_CFG_DBGR_LP2HP_NMIF) >> HPSYS_CFG_DBGR_LP2HP_NMIF_Pos) |
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#define | __HAL_SYSCFG_HPBG_EN() (hwp_hpsys_cfg->CAU2_CR |= HPSYS_CFG_CAU2_CR_HPBG_EN) |
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#define | __HAL_SYSCFG_HPBG_VDDPSW_EN() (hwp_hpsys_cfg->CAU2_CR |= HPSYS_CFG_CAU2_CR_HPBG_VDDPSW_EN) |
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#define | SystemFixClock 48000000 |
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#define | __HAL_ROM_USED |
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#define | HAL_ALIGN(size, align) (((size) + (align) - 1) & ~((align) - 1)) |
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#define | HAL_ALIGN_DOWN(size, align) ((size) & ~((align) - 1)) |
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#define | HAL_MIN(a, b) ((a) < (b) ? (a) : (b)) |
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#define | HAL_MAX(a, b) ((a) > (b) ? (a) : (b)) |
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#define | HAL_ABS(x) ((x) > 0 ? (x) : (-(x))) |
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#define | HAL_CHIP_REV_ID_A3 0xFF |
| CHIP ID for A3.
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#define | HAL_LXT_ENABLED() HAL_RTC_LXT_ENABLED() |
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#define | HAL_LXT_DISABLED() (!HAL_RTC_LXT_ENABLED()) |
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